Block Analog-to-digital converter (ADC) Converts analog voltages to digital values Boot assist module (BAM) Clock monitor unit (CMU) Cross triggering unit (CTU) Cryptographic Security Engine (CSE) Crossbar (XBAR). Table 2 summarizes the functions of the blocks present on the MPC5646C. JTAGC JTAG Port Nexus Port Nexus NMI0 Voltage NMI1 regulator NMI0 Interrupt requests from peripheral NMI1 Clocks CMU FMPLL STM RTC/API. īlock diagram 2 Block diagram Figure 1 shows the detailed block diagram of the MPC5646C. MPC5646C family comparison Feature MPC5644B Package 176 208 176 LQFP LQFP LQFP kHz oscillator (SXOSC) 12 GPIO 147 177 147 Debug JTAG Cryptographic Services Engine (CSE) 1 Feature set dependent on selected peripheral multiplexing. įeature MPC5644B MPC5644C Package 176 208 176 LQFP LQFP LQFP CPU e200z4d e200z4d + e200z0h 2 Execution speed Up to 120 MHz Up to 120 MHz (e200z4d MHz (e200z0h) Code flash memory 1.5 MB Data flash memory. To ensure a complete understanding of the device functionality. Introduction 1.1 Document Overview This document describes the features of the family and options available within the family members, and highlights important electrical and physical characteristics of the MPC5646C device. e200z4d dual issue, 32-bit core Power Architecture compliant CPU - 120 MHz - 4 KB, 2/4-Way Set Associative Instruction.
Freescale Data Sheet: Technical Data MPC5646C Microcontroller Datasheet On-chip modules available within the family include the following features:
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